These devices are a new generation of high speed JFET input monolithic operational amplifiers. Innovative design concepts along with JFET technology provide wide gain bandwidth product and high slew rate. Wellmatched JFET input devices and advanced trim techniques ensure low input offset errors and bias currents. The all NPN output stage features large output voltage swing, no deadband crossover distortion, high capacitive drive capability, excellent phase and gain margins, low open loop output impedance, and symmetrical source/sink AC frequency response.
This series of devices is available in fully compensated or decompensated (AVCL2) and is specified over a commercial temperature range. They are pin compatible with existing Industry standard operational amplifiers, and allow the designer to easily upgrade the performance of existing designs.
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• Wide Gain Bandwidth: 8.0 MHz for Fully Compensated DevicesWide Gain Bandwidth: 16 MHz for Decompensated Devices• High Slew Rate: 25 V/s for Fully Compensated Devices High Slew Rate: 50 V/s for Decompensated Devices• High Input Impedance: 1012• Input Offset Voltage: 0.5 mV Maximum (Single Amplifier)• Large Output Voltage Swing: 14.7 V to +14 V for Large Output Voltage Swing: VCC/VEE = ±15 V• Low Open Loop Output Impedance: 30 @ 1.0 MHz• Low THD Distortion: 0.01%• Excellent Phase/Gain Margins: 55°/7.6 dB for Fully Compensated Devices
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| Rating |
Symbol |
Value |
Unit |
| Supply Voltage (from VCC to VEE) |
VS |
+44 |
V |
| Input Differential Voltage Range |
VIDR |
(Note 1) |
V |
| Input Voltage Range |
VIR |
(Note 1) |
V |
| Output Short Circuit Duration (Note 2) |
tSC |
Indefinite |
sec |
| Operating Ambient Temperature Range |
TA |
0 to +70 |
°C |
| Operating Junction Temperature |
TJ |
+125 |
°C |
| Storage Temperature Range |
Tstg |
65 to +165 |
°C |
NOTES:
1. Either or both input voltages must not exceed the magnitude of VCC or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded.
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Required Field 
